Enhanced Spatial PEB Uniformity through a Novel Bake Plate Design

CD-PEB temperature experiments show that post-exposure bake (PEB) temperature non-uniformity (both in steady-state and transient phases) impacts across-wafer CD uniformity [1]. Continued improvement in CD uniformity requires across-wafer temperature uniformity for the entire PEB cycle. This poses new challenges for the design of PEB thermal modules. This paper proposes a novel PEB thermal module design together with a novel robust control methodology to address this challenge. The proposed PEB thermal module relies on an intelligent wafer “carrier”, which includes an array of Peltier devices and thermal sensors, so that the thermal uniformity of the wafer/carrier assembly can be continuously measured and controlled. The wafer resides in the carrier during the entire thermal processing cycle – transport, chill, and bake. This design enables the system comprising the wafer and the carrier to be in continual closed-loop control. As a result, thermal fluctuations due to PEB plate dynamics are largely eliminated and sharp temperature non-uniformities that result from introducing a wafer into the PEB process are greatly reduced. In essence, our design offers a thermally regulated minienvironment for silicon wafers during the entire PEB cycle. Simulation results show that this design can achieve temperature uniformities of less than 0.1C across the wafer, through the entire PEB cycle (transient, as well as steady state). Given that today’s state of the art bake plates achieve close to 0.1C uniformity only in steady-state, and may have several degrees non-uniformity during the transient, this would result in a significant improvement in across-wafer CD uniformity. The same system can be used if there is a need to customize the PEB temperature history across the wafer in order to cancel out other sources of CD non-uniformity.